Table 1 -- Exceptions and Interrupts

   
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+----------------------+-----+-----+-----------+-----+----------+
|                      |     |     | Ret addr  |     |   First  |
|                      |     |     |points to  |     | CPU with |
|                      |     |     | faulting  |ERROR|   this   |
| Description          |Int #| Type|instruction| CODE| interrupt|
+----------------------+-----+-----+-----------+-----+----------+
| Division by 0        |  0  |FAULT|    YES    |  NO |  8086    |
| Debug exception      |  1  |  *1 |     *1    |  NO |  8086    |
| Breakpoint           |  3  | TRAP|     NO    |  NO |  8086    |
| Overflow             |  4  | TRAP|     NO    |  NO |  8086    |
| Bounds check         |  5  |FAULT|    YES    |  NO | 80186    |
| Invalid opcode       |  6  |FAULT|    YES    |  NO | 80186    |
| Device not available |  7  |FAULT|    YES    |  NO | 80186    |
| Double fault         |  8  |ABORT|    YES    | YES | 80286    |
| Copr. segment overrun|  9  |ABORT|     NO    |  NO | 80286 *2 |
| Invalid TSS          | 10  |FAULT|    YES    | YES | 80286    |
| Segment not present  | 11  |FAULT|    YES    | YES | 80286    |
| Stack fault          | 12  |FAULT|    YES    | YES | 80286    |
| General protection   | 13  |FAULT|    YES    | YES | 80386    |
| Page fault           | 14  |FAULT|    YES    | YES | 80386    |
| Floating point error | 16  |FAULT|    YES    |  NO | 80286    |
| Alignment check      | 17  |FAULT|    YES    | YES | 80486    |
| Machine check        | 18  |ABORT|     NO    |  NO |Pentium *3|
| Software interrupts  |0-255| TRAP|     NO    |  NO |  ALL     |
+----------------------+-----+-----+-----------+-----+----------+
|                                                               |
| *1 On the 386 & 486 debug exception can be either traps, or   |
|    faults.  A trap is caused by the Trap Flag (TF) being set  |
|    in the flags image, or using the debug registers to        |
|    generate data breakpoints.  In this case the return address|
|    is the instruction following the trap.  Faults are         |
|    generated by setting the debug registers for code execution|
|    breakpoints.  As with all faults, the return address points|
|    to the faulting instruction.                               |
|                                                               |
| *2 Removed from the 80486, now generates exception 13.        |
|                                                               |
| *3 Model dependant.  Behavior may be different or missing on  |
|    future processors.                                         |
+---------------------------------------------------------------+

   
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